Semiconductor Manufacturing Statistics 2026
By Axis Intelligence Research
Co-author: Sophie Winslow, Industrial Technology | Last updated: August 29, 2026 | License: CC BY 4.0
Global semiconductor manufacturing equipment sales are forecast at $165.9 billion in 2026, a 23.2% year-on-year increase, while 300mm fab equipment spending reaches $133 billion. Yet Axis Intelligence Research finds that after this build-out, only about 12.6% of the world’s 300mm wafer capacity will run at 7nm and below in 2028 — up from roughly 10% in 2024.
Quick Answer
The semiconductor manufacturing industry will spend a record $165.9 billion on equipment in 2026, with $143.9 billion of that in wafer fab equipment, according to SEMI’s July 2026 forecast. Axis Intelligence Research’s Capex Revision Index (CRI) reads 117.0 for 2026 — meaning the industry’s own forward capital plans for this year have been revised up 17% since they were first published. Leading-edge capacity is growing fast in absolute terms, but its share of installed capacity moves slowly: the Axis Leading-Edge Intensity Ratio (LEIR) rises only from 10.04% in 2024 to 12.61% in 2028.
Key Findings
- Axis Intelligence Research’s Capex Revision Index reads 117.0 for target year 2026, meaning SEMI’s own forward equipment forecasts for 2026 have drifted 17% above the first figures it published for that year.
- Global semiconductor manufacturing equipment sales are forecast to reach $165.9 billion in 2026, up 23.2% from $135.1 billion in 2025, according to SEMI’s Mid-Year Total Semiconductor Equipment Forecast published July 14, 2026.
- Axis Intelligence Research finds that the Leading-Edge Intensity Ratio reaches only 12.61% in 2028 — roughly seven of every eight 300mm wafers of installed capacity will still run at nodes above 7nm.
- Axis Intelligence Research calculates Wafer Capital Intensity of $3,621 per 12-inch-equivalent wafer at TSMC in Q2 2026, up 40.6% from $2,575 in Q2 2025.
- The U.S. Department of Commerce had disbursed $13.1 billion of $31.2 billion in CHIPS direct funding awards as of April 30, 2026 — an execution rate of 41.99%, per GAO report GAO-26-109121.
How Much Is the World Spending on Semiconductor Manufacturing Equipment in 2026?
$165.9 billion, on OEM-reported sales. That is the number SEMI landed on in its Mid-Year Total Semiconductor Equipment Forecast on July 14, 2026, and it is 23.2% above the $135.1 billion the industry actually billed in 2025.
Break the total apart and the shape becomes clearer. Wafer fab equipment — wafer processing, mask and reticle, and fab facilities equipment — accounted for $116.9 billion in 2025 and is forecast at $143.9 billion in 2026, a 23.1% increase. WFE growth then continues at 21.8% in 2027 and 14.1% in 2028, carrying total equipment sales to $229.5 billion in 2028. Quarterly billings confirm the trajectory rather than merely forecasting it: SEMI reported record global equipment billings of $36.55 billion in Q1 2026, up 14% year on year.
Semiconductor manufacturing equipment sales, 2024–2028
| Year | Total equipment sales | Wafer fab equipment | Basis | Source |
|---|---|---|---|---|
| 2024 | $117.1 billion | — | Actual | SEMI, April 7, 2026 |
| 2025 | $135.1 billion | $116.9 billion | Actual | SEMI, April 7 / July 14, 2026 |
| 2026 | $165.9 billion | $143.9 billion | Forecast | SEMI, July 14, 2026 |
| 2028 | $229.5 billion | — | Forecast | SEMI, July 14, 2026 |
300mm fab equipment spending, 2025–2029
The 300mm Fab Outlook measures a narrower thing — front-end equipment installed in 300mm fabs — and it is the series that matters most for capacity planning. Spending crossed $100 billion for the first time in 2025 at $107 billion. SEMI’s April 1, 2026 edition puts 2026 at $133 billion (+18%), 2027 at $151 billion (+14%), 2028 at $155 billion (+3%) and 2029 at $172 billion (+11%). That edition tracks 404 facilities and lines worldwide, with 198 updates and nine new fabs or lines added since the December 2025 publication.
| Year | 300mm fab equipment spending | Change | Forecast vintage |
|---|---|---|---|
| 2025 | $107 billion | — | Oct 8, 2025 |
| 2026 | $133 billion | +18% | Apr 1, 2026 |
| 2027 | $151 billion | +14% | Apr 1, 2026 |
| 2028 | $155 billion | +3% | Apr 1, 2026 |
| 2029 | $172 billion | +11% | Apr 1, 2026 |
| Source: SEMI 300mm Fab Outlook |
Sophie Winslow: Nine new lines added and 198 updates in a single quarterly revision is not a forecast being maintained. It is a forecast being rebuilt. The useful question for anyone sizing tool demand is not what the 2029 number says — it is how much the 2026 number has already moved while 2026 was in progress. That is measurable, and almost nobody measures it.
The Capex Revision Index (CRI): how far the industry’s own plans have moved
CRI — Capex Revision Index is an original Axis Intelligence Research metric. It measures how much a forward capital-spending forecast for a given target year drifts between publication vintages. Base is 100 = the earliest published forecast for that target year. A reading above 100 means the industry has revised its own plans upward since it first committed them to paper.
The formula, and the three components:
| Component | Earliest forecast for 2026 | Latest forecast for 2026 | Index |
|---|---|---|---|
| Total semiconductor equipment sales | $139.0bn (Dec 9, 2024) | $165.9bn (Jul 14, 2026) | 119.35 |
| Wafer fab equipment | $123.0bn (Dec 9, 2024) | $143.9bn (Jul 14, 2026) | 116.99 |
| 300mm fab equipment spending | $116.0bn (Oct 8, 2025) | $133.0bn (Apr 1, 2026) | 114.66 |
| CRI-2026 (equal-weighted mean) | 117.0 | ||
| Source: Axis Intelligence Research, from SEMI forecast vintages |
Components are equally weighted. Every input is a published SEMI figure with a stated publication date, so any reader can recompute the reading. Snapshot date: August 29, 2026.
The intermediate vintages show this was not one abrupt correction. SEMI’s 2026 total-equipment forecast went $139.0bn (December 2024) → $138.1bn (July 2025) → $145bn (December 2025) → $165.9bn (July 2026). The first eighteen months were flat. The last seven months added $20.9 billion.
Extending the same method to later target years on the 300mm series: CRI-2027 reads 125.83 ($151bn against a $120bn base) and CRI-2028 reads 112.32 ($155bn against $138bn). The 2027 reading is the loudest one in the dataset. Forecasters have moved next year’s tool spending more than they moved this year’s.
How Much of Global Wafer Capacity Is Actually Leading-Edge?
Roughly one wafer in ten today, and roughly one in eight at the end of the decade. This is the number most coverage of the AI build-out gets wrong, because absolute growth at the leading edge is genuinely spectacular while the denominator grows too.
SEMI’s 300mm Fab Outlook puts capacity at 7nm and below at 850,000 wafers per month in 2024, 982,000 in 2025, 1.16 million in 2026 — the first year above a million — and 1.4 million in 2028. Sub-2nm capacity moves from under 200,000 wpm in 2025 to over 500,000 wpm in 2028. Total 300mm capacity reaches a record 11.1 million wpm in 2028, on a stated 7% compound annual growth rate from the end of 2024.
LEIR: the Leading-Edge Intensity Ratio
LEIR — Leading-Edge Intensity Ratio is an original Axis Intelligence Research metric: the share of global installed 300mm wafer capacity operating at 7nm and below, expressed as a percentage and carrying an explicit as-of year.
To compute a 2024 reading we reconstruct the 2024 base: SEMI states 11.1 million wpm for 2028 and a 7% CAGR from end-2024, so 2024 capacity is 11.1 ÷ 1.07⁴ = 8.468 million wpm. The 2028 reading uses two directly stated endpoints and requires no reconstruction.
| Year | Advanced capacity (7nm and below) | Total 300mm capacity | LEIR | Basis |
|---|---|---|---|---|
| 2024 | 850,000 wpm | 8.468 million wpm | 10.04% | Capacity reconstructed on stated CAGR |
| 2026 | 1,160,000 wpm | 9.695 million wpm | 11.96% | Capacity on stated CAGR path |
| 2028 | 1,400,000 wpm | 11.100 million wpm | 12.61% | Both endpoints stated by SEMI |
| Source: Axis Intelligence Research, from SEMI 300mm Fab Outlook |
The arithmetic underneath is the whole story. Advanced-node capacity grows 64.7% between 2024 and 2028. Total 300mm capacity grows 31.1% over the same window. Because the base is eight times larger, doubling the growth rate moves the share by only 2.57 percentage points. Mature and current-generation nodes are not being displaced; they are expanding alongside, and the fab investment reflects that.
A disclosed discrepancy in the source
SEMI describes the 2024–2028 advanced-node increase as approximately 69%. Its own stated endpoints of 850,000 and 1,400,000 wpm give 64.7%. A 69% increase from 850,000 implies an endpoint of 1,436,500 wpm, which suggests the published 1.4 million figure is rounded. Axis Intelligence Research uses the stated endpoints throughout, and flags the gap rather than normalising it silently. Anyone recomputing our LEIR readings will land on 64.7%, not 69%, and should.
Sophie Winslow: The AI story is told as though the whole industry has pivoted to 2nm. It hasn’t. Analog, power, automotive and every mature line still needs cleanroom space, and those tools still get bought. If your model assumes the leading edge eats the denominator, you will misjudge both the equipment mix and the fabs that get built in the second half of the decade.
What Does It Now Cost to Fund One Leading-Edge Wafer?
WCI — Wafer Capital Intensity is an original Axis Intelligence Research metric: capital expenditure in a quarter divided by 12-inch-equivalent wafers shipped in the same quarter, at the same company. It answers a question that headline capex figures cannot — whether spending is buying output or buying difficulty.
TSMC discloses both inputs in its quarterly management report, which makes the calculation reproducible.
| Quarter | Capex | Wafers shipped (12-in equiv.) | WCI | Source |
|---|---|---|---|---|
| Q2 2025 | US$9.572bn | 3,718,000 | $2,575 | TSMC 2Q26 Management Report |
| Q1 2026 | US$11.10bn | 4,174,000 | $2,659 | TSMC 2Q26 Management Report |
| Q2 2026 | US$15.70bn | 4,336,000 | $3,621 | TSMC 2Q26 Management Report |
| Calculation: Axis Intelligence Research |
Q2 2025 capex is reported as NT$297.22 billion; we convert at TSMC’s own stated Q2 2025 average rate of 31.05 NT dollars per US dollar, giving US$9.572 billion.
The result: WCI rose 40.6% year over year. Capex grew 64.0%; wafer shipments grew 16.6%. TSMC is spending nearly two-thirds more to ship one-sixth more wafers. That gap is what a node transition looks like on a cash-flow statement — and it lines up with what the company disclosed on the same day. Per TSMC’s Form 6-K for Q2 2026, 2nm contributed 3% of wafer revenue in its first commercial quarter, 3nm 30%, 5nm 33% and 7nm 11%, with advanced technologies at 77% of wafer revenue and gross margin at 67.7%.
TSMC spent US$26.80 billion in the first half of 2026 and guided full-year 2026 capex to $60–64 billion on its July 16, 2026 earnings call. That guidance is not in the written earnings release; it is management commentary, and we label it as such.
What we will not calculate
TSMC shipped 4,336 thousand 12-inch-equivalent wafers in Q2 2026. SEMI forecasts 11.1 million wafers per month of global 300mm capacity in 2028. It is tempting to divide one into the other and publish a market share. We won’t. Shipments are throughput; capacity is installed potential; 12-inch-equivalent is a normalisation that folds smaller wafer sizes into a 300mm-equivalent count, and SEMI’s 300mm series does not. Merging them produces a number that means nothing, so the two figures sit side by side in our dataset and in this article, unmerged.
How Much CHIPS Act Money Has Actually Reached U.S. Fabs?
$13.1 billion of $31.2 billion — an execution rate of 41.99% as of April 30, 2026. The figure comes from GAO-26-109121, published August 6, 2026, and it is the single most useful number in the U.S. semiconductor manufacturing file because it separates announcement from money in a contractor’s account.
By July 15, 2026 the Department of Commerce had awarded approximately $31.7 billion in direct funding to 24 companies across 49 projects — about 89.3% of the $35.5 billion available for the incentives programme — plus $6.8 billion in loans to three companies. Of the 49 projects, 33 are chip manufacturing, 11 are materials production and nine are assembly, test and packaging. Axis Intelligence Research calculates that $18.1 billion of awarded direct funding remained undisbursed at the April 2026 cut-off.
| CHIPS incentives status | Value | As of | Source |
|---|---|---|---|
| Direct funding awarded | $31.7 billion | Jul 15, 2026 | GAO-26-109121 |
| Available incentive funds | $35.5 billion | Jul 15, 2026 | GAO-26-109121 |
| Direct funding disbursed | $13.1 billion | Apr 30, 2026 | GAO-26-109121 |
| Awards outstanding at disbursement cut-off | $31.2 billion | Apr 30, 2026 | GAO-26-109121 |
| Loans awarded | $6.8 billion | Jul 15, 2026 | GAO-26-109121 |
| Projects funded | 49 across 24 companies | Jul 15, 2026 | GAO-26-109121 |
Milestones, not press releases
GAO’s milestone tracking is where the construction-schedule reality shows. Eleven awardees had received disbursements for 24 completed project milestones as of April 2026; about half of those were completed on or before their anticipated dates, and all were completed by their contractually required due dates. A further 125 milestones remained in progress, of which nine had passed their anticipated completion date without passing a contractual due date. Intel’s milestones are excluded from that analysis: its award was amended in August 2025 so that its six projects count as complete once it incurs $7.865 billion in eligible costs, in exchange for Commerce taking 9.9% of outstanding shares — valued at $8.9 billion at the time and at approximately $44.6 billion at the July 15, 2026 market close of $102.99 per share.
Public dollars against announced private dollars
The Semiconductor Industry Association reports more than $770 billion in announced U.S. private-sector semiconductor investment since 2020, across 160 projects in 30 states. Against $31.7 billion in federal direct funding awarded, Axis Intelligence Research calculates a ratio of $24.29 announced private dollars per $1 of federal direct funding awarded. The numerator is announcement-based and the denominator is obligation-based; the ratio is a leverage indicator, not an attribution of causality, and we state that plainly.
Individual awards show the mechanism at the project level. The CHIPS Program Office signed a direct funding agreement with Bosch for up to $225 million in July 2026, supporting a $2 billion conversion of its Roseville, California facility to silicon carbide production, alongside Bosch’s stated plan to invest $7.5 billion in U.S. operations over five years, per NIST.
The R&D side went the other way
Of $11 billion appropriated for advanced microelectronics R&D, Commerce cancelled awards representing $7.8 billion — 70.9% of the appropriation — and had expended $506.8 million, or 4.61%. The National Semiconductor Technology Center award was voided in August 2025, the operating entity ceased operations in September 2025, and $64.1 million in administrative closeout costs had already been paid. GAO recommended Commerce produce plans and timelines for the NSTC, the National Advanced Packaging Manufacturing Program and the Industrial Advisory Committee; Commerce agreed with all three recommendations.
Sophie Winslow: Forty-two percent disbursed after four years is not a scandal — milestone-gated funding is supposed to be slow, and every dollar released is tied to a completed construction or tool move-in event. But it is the right denominator. When a headline says $31.7 billion has been awarded, the fabs have seen $13.1 billion of it, and the incentive structure is doing exactly what it was designed to do: pay for concrete, not for announcements.
Which Segments Are Absorbing the Fab Investment?
Logic first, memory second, and memory’s share is rising faster than the cycle usually allows. SEMI’s April 2026 300mm Fab Outlook projects $228 billion of Logic & Micro equipment investment across 2027–2029, driven by sub-2nm foundry capacity, against $175 billion for memory — split $111 billion DRAM and $62 billion 3D NAND.
| Segment | Equipment investment 2027–2029 | Share of the two segments | Source |
|---|---|---|---|
| Logic & Micro | $228 billion | 56.6% | SEMI, Apr 1, 2026 |
| Memory (total) | $175 billion | 43.4% | SEMI, Apr 1, 2026 |
| — DRAM | $111 billion | — | SEMI, Apr 1, 2026 |
| — 3D NAND | $62 billion | — | SEMI, Apr 1, 2026 |
The memory number has a visible counterpart in company filings. Micron’s fiscal Q3 2026 results, for the quarter ended May 28, 2026, report net capital expenditures of $7.1 billion on revenue of $41.46 billion — against $3.9 billion of net capex in fiscal Q1 2026, a quarter that ended six months earlier.
On the demand side, the SIA reports that a single AI server rack contains more than 4,500 packaged semiconductors and that chips represent more than 95% of such a rack’s value, with SIA and Deloitte research projecting more than $4 trillion of global AI data centre infrastructure investment through 2028, up to $2.8 trillion of it semiconductors.
How Does Manufacturing Policy Compare Across the US, EU and Taiwan?
The three jurisdictions are not running the same instrument, and comparing headline pots of money without saying so is the most common error in this subject.
The United States runs milestone-gated direct funding: $35.5 billion available, $31.7 billion awarded, $13.1 billion disbursed, plus a 35% Advanced Manufacturing Investment Credit for facilities beginning construction on or before December 31, 2026.
The European Union’s first Chips Act is framed as policy-driven investment rather than a central grant pot: the European Commission describes more than €43 billion of policy-driven investment supporting the Act until 2030, of which the European Parliament secured €3.3 billion for chips research and innovation through Horizon Europe and Digital Europe. The Commission adopted its Chips Act 2.0 proposal on June 3, 2026, which is now in the ordinary legislative procedure.
Taiwan’s capacity is not built by an incentive programme at all. It is built by a single company’s balance sheet: TSMC’s US$26.80 billion of first-half 2026 capex is more than double what the entire U.S. CHIPS programme has disbursed since 2022. That comparison is between a private capital budget and a public subsidy disbursement, so it is not a like-for-like measure of national effort — but it is the correct scale check on what industrial policy can and cannot move.
Capital intensity is falling even as spending sets records
One ratio makes the AI cycle look different from every prior one. Axis Intelligence Research calculates equipment sales as a share of semiconductor sales at 16.98% in 2025 ($135.1bn against $795.6bn) and a projected 11.06% in 2026 ($165.9bn against the $1.5 trillion WSTS projection reported by SIA). Record absolute tool spending, falling capital intensity — because chip revenue is growing faster than the capacity being installed to produce it. That is a pricing and mix phenomenon, not a capacity phenomenon, and it is the single clearest signal that 2026’s revenue records are not yet backed by proportionate physical output.
Methodology
Collection. Every figure in this article was retrieved from a source document opened during production on August 29, 2026, and logged with its URL and retrieval date in the accompanying CSV. Sources are SEMI press releases and market-data pages, the Semiconductor Industry Association’s 2026 State of the U.S. Semiconductor Industry, U.S. Government Accountability Office report GAO-26-109121, NIST CHIPS Program Office announcements, TSMC’s Form 6-K and quarterly management report, Micron’s Form 8-K exhibits, and European Commission and European Parliament publications. No secondary aggregator supplied any figure in this dataset.
Formulas. Three Axis metrics appear above, each computed from rows in the CSV:
- CRI (Capex Revision Index) = mean of (latest published forecast for target year Y ÷ earliest published forecast for target year Y) × 100, across three equally weighted SEMI series: total semiconductor equipment sales, wafer fab equipment, and 300mm fab equipment spending. Base 100 = first published forecast. CRI-2026 = (119.35 + 116.99 + 114.66) ÷ 3 = 117.0.
- LEIR (Leading-Edge Intensity Ratio) = (installed 300mm capacity at 7nm and below ÷ total installed 300mm capacity) × 100. The 2024 and 2026 denominators are reconstructed from SEMI’s stated 2028 endpoint of 11.1 million wpm and its stated 7% CAGR from end-2024: 11.1 ÷ 1.07⁴ = 8.468 million wpm for 2024, × 1.07² = 9.695 million wpm for 2026.
- WCI (Wafer Capital Intensity) = quarterly capital expenditure ÷ 12-inch-equivalent wafers shipped in the same quarter, same reporting entity. Q2 2025 capex converted from NT$297.22bn at TSMC’s own stated average rate of 31.05.
All arithmetic was verified in two independent computational passes — floating-point and exact rational — before any figure was written into prose.
Scope. Capacity figures are installed capacity, not utilised output; a fab at 60% utilisation contributes the same wafers-per-month to these series as one at 95%. SEMI’s 300mm series excludes 200mm and smaller lines, which remain material for analog, power and automotive devices. CHIPS disbursement figures carry an April 30, 2026 cut-off while award figures carry a July 15, 2026 cut-off, because GAO’s data collection dates differ; we report both dates rather than blending them. TSMC’s 12-inch-equivalent shipment count and SEMI’s 300mm capacity series use different normalisations and are not combined anywhere in this dataset. Forward-year figures are forecasts and are labelled with their publication vintage; the CRI exists precisely because those vintages move.
Disclosed source discrepancy. SEMI characterises the 2024–2028 growth in 7nm-and-below capacity as approximately 69%, while its own stated endpoints give 64.7%. Axis Intelligence Research uses the stated endpoints and reports the gap.
About This Dataset
Contents: 148 rows covering global semiconductor manufacturing equipment sales and forecasts by vintage, 300mm fab equipment spending 2025–2029, installed and advanced-node wafer capacity 2024–2028, segment-level equipment investment 2027–2029, U.S. CHIPS Act award and disbursement status, European Chips Act funding, and quarterly capex and wafer shipment data for TSMC and Micron. Thirty-six rows are Axis-calculated and each carries its formula in the method_note column.
Temporal coverage: 2024-01-01 / 2029-12-31.
Spatial coverage: Worldwide, with breakouts for the United States, European Union and Taiwan.
Format: UTF-8 CSV, one header row, one observation per row, ISO 8601 dates, raw values with units in a separate column.
Licence: CC BY 4.0. Free to reuse, including commercially, with attribution.
Download: semiconductor-manufacturing-statistics-2026.csv
Cite This Research
APA — Axis Intelligence Research. (2026). Semiconductor manufacturing statistics 2026: Fab capacity, equipment spending and the leading-edge gap. https://axis-intelligence.com/semiconductor-manufacturing-statistics/
MLA — Axis Intelligence Research. “Semiconductor Manufacturing Statistics 2026: Fab Capacity, Equipment Spending and the Leading-Edge Gap.” Axis Intelligence, 29 Aug. 2026, axis-intelligence.com/semiconductor-manufacturing-statistics/.
Chicago — Axis Intelligence Research. “Semiconductor Manufacturing Statistics 2026: Fab Capacity, Equipment Spending and the Leading-Edge Gap.” Axis Intelligence, August 29, 2026. https://axis-intelligence.com/semiconductor-manufacturing-statistics/.
Frequently Asked Questions
Does wafer capacity in wafers per month tell you how many chips get manufactured?
No. Wafers per month is installed capacity — the throughput a fab could sustain if fully loaded. Actual chip output depends on utilisation, die size and yield. A 300mm wafer of large AI accelerator die yields a few dozen good units; the same wafer running microcontrollers yields thousands. Capacity series like SEMI’s 11.1 million wpm for 2028 are the right denominator for tool demand and the wrong one for unit supply.
Why is 300mm capacity reported separately from total installed capacity?
Because 300mm is where nearly all new investment goes, while a large installed base of 200mm and smaller lines keeps producing analog, power, discrete and automotive devices that never migrate to larger wafers. SEMI’s 300mm Fab Outlook tracked 404 facilities and lines in its April 2026 edition; the broader World Fab Forecast database covers a far larger population. Mixing the two produces double-counting, so this dataset keeps the 300mm series intact and labelled.
If leading-edge capacity grows 14% a year, why does the leading-edge share barely move?
Because the denominator grows too. Advanced-node capacity at 7nm and below rises 64.7% between 2024 and 2028 while total 300mm capacity rises 31.1%. Starting from a base of roughly one-tenth, doubling the growth rate of the small component moves the ratio by 2.57 percentage points — from a LEIR of 10.04% to 12.61%. Compounding on a small base takes longer to show up in a share than most forecasts assume.
What is the difference between fab equipment spending and semiconductor equipment billings?
Equipment billings are what OEMs invoice, reported by SEMI’s Worldwide Semiconductor Equipment Market Statistics on a quarterly cadence — $36.55 billion in Q1 2026. Fab equipment spending is what fab operators commit to install in a given facility, tracked bottom-up per project in the Fab Forecast databases — $133 billion for 300mm fabs in 2026. The two series measure different sides of the same transaction and settle in different periods, so they will never reconcile exactly.
Does a CHIPS Act award mean a fab has been built?
No. An award is a commitment; disbursement is milestone-gated. As of April 30, 2026, $13.1 billion of $31.2 billion in direct funding awards had actually been paid out — 41.99%. Awardees had completed 24 milestones and had 125 still in progress. Reading the award total as built capacity overstates U.S. progress by roughly the $18.1 billion of undisbursed funding.
Why did SEMI’s 2026 equipment forecast move so much between vintages?
It moved late rather than steadily. The forecast for 2026 sat at $139.0 billion in December 2024 and $138.1 billion in July 2025 — essentially flat for eighteen months — then went to $145 billion in December 2025 and $165.9 billion in July 2026. The revision tracks the AI infrastructure order book firming up, particularly in HBM-related DRAM and leading-edge logic. The Capex Revision Index reading of 117.0 quantifies that drift.
Can TSMC’s wafer shipments be compared with SEMI’s global capacity figures?
Not directly, and this dataset does not. TSMC reports 12-inch-equivalent shipments, which normalise smaller wafer sizes into a 300mm-equivalent count; SEMI’s 300mm series counts 300mm capacity only. Shipments measure throughput; capacity measures installed potential. Dividing one by the other produces a share figure with no defensible meaning, so both appear in the dataset unmerged.
Which node is carrying AI accelerator volume in 2026?
5nm and 3nm, not 2nm. In Q2 2026 — the first commercial quarter for 2nm — TSMC’s wafer revenue split 3% at 2nm, 30% at 3nm, 33% at 5nm and 11% at 7nm, with advanced technologies at 77% of wafer revenue overall. Sub-2nm capacity industry-wide remains under 200,000 wpm as of 2025 and is forecast above 500,000 wpm only by 2028.
What would push the Capex Revision Index back toward 100?
A downward revision in a subsequent SEMI vintage — which historically follows either a memory pricing correction or a pause in hyperscaler order commitments. The index is deliberately asymmetric in what it reveals: a reading of 117.0 says the industry underestimated its own 2026 tool spending, and a reading below 100 in a future year would say it overestimated. Neither is a forecast; both are measurements of forecast behaviour.
Related Axis Intelligence Research: semiconductor market statistics for sales, WSTS forecasts and end-market breakdowns · TSMC statistics for the full foundry financial picture · AI chip market share for vendor revenue and the CoWoS packaging chokepoint · Nvidia statistics and AMD statistics for the fabless customers driving leading-edge demand · Nvidia GPU market share for accelerator competition.